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Hybridization process for back-illuminated silicon Geiger-mode avalanche photodiode arrays

Published in:
SPIE Vol. 7681, Advanced Photon Counting Techniques IV, 5 April 2010, 76810P.

Summary

We present a unique hybridization process that permits high-performance back-illuminated silicon Geiger-mode avalanche photodiodes (GM-APDs) to be bonded to custom CMOS readout integrated circuits (ROICs) - a hybridization approach that enables independent optimization of the GM-APD arrays and the ROICs. The process includes oxide bonding of silicon GM-APD arrays to a transparent support substrate followed by indium bump bonding of this layer to a signal-processing ROIC. This hybrid detector approach can be used to fabricate imagers with high-fill-factor pixels and enhanced quantum efficiency in the near infrared as well as large-pixel-count, small-pixel-pitch arrays with pixel-level signal processing. In addition, the oxide bonding is compatible with high-temperature processing steps that can be used to lower dark current and improve optical response in the ultraviolet.
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Summary

We present a unique hybridization process that permits high-performance back-illuminated silicon Geiger-mode avalanche photodiodes (GM-APDs) to be bonded to custom CMOS readout integrated circuits (ROICs) - a hybridization approach that enables independent optimization of the GM-APD arrays and the ROICs. The process includes oxide bonding of silicon GM-APD arrays to...

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Three-dimensional integration technology for advanced focal planes

Summary

We have developed a three-dimensional (3D) circuit integration technology that exploits the advantages of silicon-on-insulator (SOI) technology to enable wafer-level stacking and micrometer-scale electrical interconnection of fully fabricated circuit wafers. This paper describes the 3D technology and discusses some of the advanced focal plane arrays that have been built using it.
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Summary

We have developed a three-dimensional (3D) circuit integration technology that exploits the advantages of silicon-on-insulator (SOI) technology to enable wafer-level stacking and micrometer-scale electrical interconnection of fully fabricated circuit wafers. This paper describes the 3D technology and discusses some of the advanced focal plane arrays that have been built using...

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Geiger-mode quad-cell array for adaptive optics

Published in:
CLEO-QELS, 2008 Conf. on Lasers and Electro-Optics/Quantum Electronics and Laser Science Conf., 4-9 May 2008.

Summary

We report an array of Shack-Hartmann wavefront sensors using high-fill-factor Geiger-mode avalanche detector quad cells hybridized to all-digital CMOS counting circuits. The absence of readout noise facilitates fast wavefront sensing at low light levels.
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Summary

We report an array of Shack-Hartmann wavefront sensors using high-fill-factor Geiger-mode avalanche detector quad cells hybridized to all-digital CMOS counting circuits. The absence of readout noise facilitates fast wavefront sensing at low light levels.

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Arrays of InP-based avalanche photodiodes for photon counting

Summary

Arrays of InP-based avalanche photodiodes (APDs) with InGaAsP absorber regions have been fabricated and characterized in the Geiger mode for photon-counting applications. Measurements of APDs with InGaAsP absorbers optimized for 1.06 um wavelength show dark count rates (DCRs)
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Summary

Arrays of InP-based avalanche photodiodes (APDs) with InGaAsP absorber regions have been fabricated and characterized in the Geiger mode for photon-counting applications. Measurements of APDs with InGaAsP absorbers optimized for 1.06 um wavelength show dark count rates (DCRs)

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A wafer-scale 3-D circuit integration technology

Published in:
IEEE Trans. Electron Devices, Vol. 53, No. 10, October 2006, pp. 2507-2516.

Summary

The rationale and development of a wafer-scale three-dimensional (3-D) integrated circuit technology are described. The essential elements of the 3-D technology are integrated circuit fabrication on silicon-on-insulator wafers, precision wafer-wafer alignment using an in-house-developed alignment system, low-temperature wafer-wafer bonding to transfer and stack active circuit layers, and interconnection of the circuit layers with dense-vertical connections with sub-[Omega] 3-D via resistances. The 3-D integration process is described as well as the properties of the four enabling technologies. The wafer-scale 3-D technology imposes constraints on the placement of the first lithographic level in a wafer-stepper process. Control of wafer distortion and wafer bow is required to achieve submicrometer vertical vias. Three-tier digital and analog 3-D circuits were designed and fabricated. The performance characteristics of a 3-D ring oscillator, a 1024 x 1024 visible imager with an 8-um pixel pitch, and a 64 x 64 Geiger-mode laser radar chip are described.
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Summary

The rationale and development of a wafer-scale three-dimensional (3-D) integrated circuit technology are described. The essential elements of the 3-D technology are integrated circuit fabrication on silicon-on-insulator wafers, precision wafer-wafer alignment using an in-house-developed alignment system, low-temperature wafer-wafer bonding to transfer and stack active circuit layers, and interconnection of the...

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Laser radar imager based on 3D integration of Geiger-mode avalanche photodiodes with two SOI timing circuit layers

Summary

We have developed focal-plane arrays and laser-radar (ladar) imaging systems based on Geiger-mode avalanche photodiodes (APDs) integrated with high-speed all-digital CMOS timing circuits. A Geiger-mode APD produces a digital pulse upon detection of a single photon. This pulse is used to stop a fast digital counter in the pixel circuit, thereby measuring photon arrival time. This "photon-to-digital conversion" yields quantum-limited sensitivity and noiseless readout, enabling high-performance ladar systems. Previously reported focal planes, based on bump bonding or epoxy bonding the APDs to foundry chips, had coarse (100um) pixel spacing and 0.5ns timing quantization.
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Summary

We have developed focal-plane arrays and laser-radar (ladar) imaging systems based on Geiger-mode avalanche photodiodes (APDs) integrated with high-speed all-digital CMOS timing circuits. A Geiger-mode APD produces a digital pulse upon detection of a single photon. This pulse is used to stop a fast digital counter in the pixel circuit...

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Geiger-mode avalanche photodiodes for three-dimensional imaging

Published in:
Lincoln Laboratory Journal, Vol. 13, No. 2, 2002, pp. 335-350.

Summary

We discuss the properties of Geiger-mode avalanche photodiodes (APDs) and their use in developing an imaging laser radar (ladar). This type of photodetector gives a fast electrical pulse in response to the detection of even a single photon, allowing for sub-nsec-precision photon-flight-time measurement. We present ongoing work at Lincoln Laboratory on three-dimensional (3D) imaging with arrays of these diodes, and the integration of the arrays with fast complementary metal-oxide semiconductor (CMOS) digital timing circuits.
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Summary

We discuss the properties of Geiger-mode avalanche photodiodes (APDs) and their use in developing an imaging laser radar (ladar). This type of photodetector gives a fast electrical pulse in response to the detection of even a single photon, allowing for sub-nsec-precision photon-flight-time measurement. We present ongoing work at Lincoln Laboratory...

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