Publications
Iterative techniques for minimum phase signal reconstruction from phase or magnitude
Summary
Summary
In this paper, we develop iterative algorithms for reconstructing a minimum phase sequence from pthhea se or magnitude of its Fourier transform. These iterative solutions involve repeatedly imposing a causality constraint in the time domain and incorporating the known phase or magnitude function in the frequency domain. This approach is...
Recursive two-dimensional signal reconstruction from linear system input and output magnitudes
Summary
Summary
A recursive algorithm is presented for reconstructing a two-dimensional complex signal from its magnitude and the magnitude of the output of a known linear shift-invariant system whose input is the desired signal. The recursion has a simple geometric interpretation, and is easily extended to causal, shift-varying systems.
Voice communication in integrated digital voice and data networks
Summary
Summary
Voice communication networks have traditionally been designed to provide either analog signal paths or fixed-rate synchronous digital connections between individual subscribers. These designs were aimed at accommodating the "streamlike" character of speech, which has traditionally been considered to flow from source to destination at a more or less constant rate...
Convergence of iterative nonexpansive signal reconstruction algorithms
Summary
Summary
Iterative algorithms for signal reconstruction from partial time- and frequency-domain knowledge have proven useful in a number of application areas. In this paper, a general convergence proof, applicable to a general class of such iterative reconstruction algorithms, is presented. The proof relies on the concept of a nonexpansive mapping in...
Data traffic performance of an integrated circuit and packet-switched multiplex structure
Summary
Summary
Results are developed for data traffic performance in an integrated multiplex structure which includes circuit-switching for voice and packet-switching for data. The results are obtained both through simulation and analysis, and show that excessive data queues and delays will build up under heavy loading conditions. These large data delays occur...
The tradeoff between delay and TASI advantage in a packetized speech multiplexer
Summary
Summary
A packetized speech multiplexer differs from a circuit-switched TASI system in that the presence of a packet buffer allows a tradeoff where the TASI advantage can be increased at a cost in packet delay. This tradeoff is investigated via a simulation. Results are presented to show the relations between TASI...
A phrase recognizer using syllable-based acoustic measurements
Summary
Summary
A system for the recognition of spoken phrases is described. The recognizer assumes that the input utterance contains one of a known set of allowable phrases, which may be spoken within a longer carrier sentence. Analysis is performed on a syllable-by-syllable basis with only the strong syllables considered in the...
A linear prediction vocoder with voice excitation
Summary
Summary
A speech bandwidth compression system, which employs voice excitation in conjunction with a Linear Predictive Coding (LPC) parameterization of the vocal tract filter, is described. To generate the excitation signal, the transmitted speech baseband is broadened at the receiver with a nonlinear distorter, and spectrally flattened by means of an...
A system for acoustic-phonetic analysis of continuous speech
Summary
Summary
A system for acoustic-phonetic analysis of continuous speech is being developed to serve as part of an automatic speech understanding system. The acoustic system accepts the speech waveform as an input and produces as output a string of phoneme-like units referred to as acoustic phonetic elements (APEL'S). This paper should...
Effects of finite register length in digital filtering and the fast Fourier transform
Summary
Summary
When digital signal processing operations are implemented on a computer or with special-purpose hardware, errors and constraints due to finite word length are unavoidable. The main categories of finite register length effects are errors due to A/D conversion, errors due to roundoffs in the arithmetic, constraints on signal levels imposed...