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Effect of surface roughness and H-termination chemistry on diamond's semiconducting surface conductance

April 10, 2017
  |
Journal Article
Author:
Travis C. Wade
…
Published in:
Diamond Related Mater., Vol. 76, 1 June 2017, pp. 79-85.
Topic:
advanced materials
R&D area:
R&D group:

Summary

The H-terminated surface of diamond when activated with NO2 produces a surface conduction layer that has been used to make FETs. Variations in processing can significantly affect this conduction layer. This article discusses the effect of diamond surface preparation and H termination procedures on surface conduction. Surface preparations that generate a rough surface result in a more conductive surface with the conductivity increasing with surface roughness. We hypothesize that the increase in conductance with roughness is the result of an increase of reactive sites that generate the carriers. Roughening the diamond surface is just one way to generate these sites and the rough surface is believed to be a separate property from the density of surface reactive sites. The presence of C in the H2 plasma used for H termination decreases surface conductance. A simple procedure for NO2 activation is demonstrated. Interpretation of electrical measurements and possible alternatives to activation with NO2 are discussed. Using Kasu's oxidation model for surface conductance as a guide, compounds other than NO2 have been found to activate the diamond surface as well.
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Summary

The H-terminated surface of diamond when activated with NO2 produces a surface conduction layer that has been used to make FETs. Variations in processing can significantly affect this conduction layer. This article discusses the effect of diamond surface preparation and H termination procedures on surface conduction. Surface preparations that generate...

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Effect of surface roughness and H-termination chemistry on diamond's semiconducting surface conductance

High-voltage GaN-on-silicon Schottky diodes

May 13, 2013
  |
Conference Paper
Author:
Timothy Boles
…
Published in:
CS ManTech 2013, 13-16 May 2013.
Topic:
electronics
R&D area:

Summary

M/A-COM Technology Solutions has continuing joint development efforts sponsored by the Department of Energy with MIT main campus and MIT Lincoln Laboratory to develop GaN-on-silicon two and three-terminal high-voltage/high current switching devices. The initial developmental goals were for a Schottky diode that has a reverse breakdown blocking voltage of >600 volts and is capable of handling 10 amperes of forward current. A comparison of the M/A-COM Technology Solutions lateral GaN Schottky diode on-resistance as a function of reverse breakdown voltage for a number of both lateral and vertical GaN Schottky diode geometries taken from the literature is presented. The substrates employed for all of these data points are either sapphire, SiC, silicon, and even one study which utilized single crystal GaN. Also included in this plot are theoretical limits for the basic materials typically used in GaN Schottky diode construction. It can be seen that the reverse breakdown results of approximately 1500 volts for M/A/-COM Technology Solutions lateral anode connected field GaN Schottky diodes on silicon substrates compare extremely favorably with the reported performance of the state-of-the-art devices, regardless of substrate material or design geometry.
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Summary

M/A-COM Technology Solutions has continuing joint development efforts sponsored by the Department of Energy with MIT main campus and MIT Lincoln Laboratory to develop GaN-on-silicon two and three-terminal high-voltage/high current switching devices. The initial developmental goals were for a Schottky diode that has a reverse breakdown blocking voltage of >600...

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High-voltage GaN-on-silicon Schottky diodes

High voltage GaN-on-silicon HEMT

May 1, 2013
  |
Journal Article
Author:
Timothy Boles
…
Published in:
Phys. Status Solidi C, Vol. 10, No. 5, May 2013, pp. 844-8.
Topic:
electronics
R&D area:

Summary

M/A-COM Technology Solutions has continued in the joint development efforts sponsored by the Department of Energy with MIT main campus amd MIT Lincoln Labs to develop GaN on silicon three terminal high voltage/high current HEMT switching devices. The first year developmental goals were for a three terminal structure that has a reverse breakdown characteristic of >1200 V and is capable of switching 10 amperes of current. An average three terminal breakown of 1322 V was achieved on a single finger 250 um GaN on silicon HEMT device utilizing a source connected field plate with a 4.5 um drain region overlap. An individual device breakdown on a single finger 250 um GaN on silicon HEMT device with a SCFP of >1630 V was measured at a current of 250 uA (1mA/mm) - One of the highest yet reported for GaN on silicon in the industry.
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Summary

M/A-COM Technology Solutions has continued in the joint development efforts sponsored by the Department of Energy with MIT main campus amd MIT Lincoln Labs to develop GaN on silicon three terminal high voltage/high current HEMT switching devices. The first year developmental goals were for a three terminal structure that has...

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High voltage GaN-on-silicon HEMT

Time-reversal symmetry and universal conductance fluctuations in a driven two-level system

January 2, 2013
  |
Journal Article
Author:
Simon Gustavsson
…
Published in:
Phys. Rev. Lett., Vol. 110, No. 1, 2 January 2013, 016603.
Topic:
electronics
R&D area:
R&D group:

Summary

In the presence of time-reversal symmetry, quantum interference gives strong corrections to the electric conductivity of disordered systems. The self-interference of an electron wave function traveling time-reversed paths leads to effects such as weak localization and universal conductance fluctuations. Here, we investigate the effects of broken time-reversal symmetry in a driven artificial two-level system. Using a superconducting flux qubit, we implement scattering events as multiple Landau-Zener transitions by driving the qubit periodically back and forth through an avoided crossing. Interference between different qubit trajectories gives rise to a speckle pattern in the qubit transition rate, similar to the interference patterns created when coherent light is scattered off a disordered potential. Since the scattering events are imposed by the driving protocol, we can control the time-reversal symmetry of the system by making the drive waveform symmetric or asymmetric in time. We find that the fluctuations of the transition rate exhibit a sharp peak when the drive is time symmetric, similar to universal conductance fluctuations in electronic transport through mesoscopic systems.
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Summary

In the presence of time-reversal symmetry, quantum interference gives strong corrections to the electric conductivity of disordered systems. The self-interference of an electron wave function traveling time-reversed paths leads to effects such as weak localization and universal conductance fluctuations. Here, we investigate the effects of broken time-reversal symmetry in a...

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Time-reversal symmetry and universal conductance fluctuations in a driven two-level system

Atomic layer deposition of Sc2O3 for passivating AlGaN/GaN high electron mobility transistor devices

December 3, 2012
  |
Journal Article
Author:
Xinwei Wang
…
Published in:
Appl. Phys. Lett., Vol. 101, No. 23, 3 December 2012, 232109.
Topic:
electronics
R&D area:

Summary

Polycrystalline, partially epitaxial Sc2O3 films were grown on AlGaN/GaN substrates by atomic layer deposition (ALD). With this ALD Sc2O3 film as the insulator layer, the Sc2O3/AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors showed excellent electrical performance with a high Ion/Ioff ratio of over 108 and a low subthreshold slope of 75 mV/dec. The UV/NH4OH surface treatment on AlGaN/GaN prior to ALD was found to be critical for achieving these excellent figures. In addition, the Sc2O3 dielectric is found to be negatively charged, which facilitates the enhancement-mode operation. While bare Sc2O3 suffers from moisture degradation, depositing a moisture blocking layer of ALD Al2O3 can effectively eliminate this effect.
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Summary

Polycrystalline, partially epitaxial Sc2O3 films were grown on AlGaN/GaN substrates by atomic layer deposition (ALD). With this ALD Sc2O3 film as the insulator layer, the Sc2O3/AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors showed excellent electrical performance with a high Ion/Ioff ratio of over 108 and a low subthreshold slope of 75...

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Atomic layer deposition of Sc2O3 for passivating AlGaN/GaN high electron mobility transistor devices

FDSOI process technology for subthreshold-operation ultra-low power electronics

May 1, 2011
  |
Conference Paper
Author:
Steven A. Vitale
…
Published in:
ECS Meeting, 1 May 2011 (in: Adv. Semiconductor-on-Insulator Technol. Rel. Phys., Vol. 35, No. 5, 2011, pp. 179-188).
Topic:
electronics
R&D area:

Summary

Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process technology is required to enable the highest performance devices possible while maintaining extremely low power consumption. Transistors optimized for subthreshold operation at 0.3 V may achieve a 97% reduction in switching energy compared to conventional transistors. The process technology described in this article takes advantage of the capacitance and performance benefits of thin-body silicon-on-insulator devices, combined with a workfunction engineered mid-gap metal gate.
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Summary

Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process technology is required to enable the highest performance devices possible while maintaining extremely low power consumption. Transistors optimized for subthreshold operation...

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FDSOI process technology for subthreshold-operation ultra-low power electronics

FDSOI process technology for subthreshold-operation ultralow-power electronics

February 1, 2010
  |
Journal Article
Author:
Steven A. Vitale
…
Published in:
Proc. of the IEEE, Vol. 98, No. 2, February 2010, pp. 333-342.
Topic:
electronics
R&D area:

Summary

Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process technology is required to enable the highest performance devices possible while maintaining extremely low power consumption. Transistors optimized for subthreshold operation at 0.3 V may achieve a 97% reduction in switching energy compared to conventional transistors. The process technology described in this article takes advantage of the capacitance and performance benefits of thin-body silicon-oninsulator devices, combined with a workfunction engineered mid-gap metal gate.
READ LESS

Summary

Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process technology is required to enable the highest performance devices possible while maintaining extremely low power consumption. Transistors optimized for subthreshold operation...

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FDSOI process technology for subthreshold-operation ultralow-power electronics

Effect of carrier lifetime on forward-biased silicon Mach-Zehnder modulators

April 14, 2008
  |
Journal Article
Author:
Gui-Rong Zhou
…
Published in:
Opt. Express, Vol. 16, No. 8, 14 April 2008, pp. 5218-5226.
Topic:
optics
R&D area:
R&D group:

Summary

We present a systematic study of Mach-Zehnder silicon optical modulators based on carrier-injection. Detailed comparisons between modeling and measurement results are made with good agreement obtained for both DC and AC characteristics. A figure of merit, static VpiL, as low as 0.24Vmm is achieved. The effect of carrier lifetime variation with doping concentration is explored and found to be important for the modulator characteristics.
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Summary

We present a systematic study of Mach-Zehnder silicon optical modulators based on carrier-injection. Detailed comparisons between modeling and measurement results are made with good agreement obtained for both DC and AC characteristics. A figure of merit, static VpiL, as low as 0.24Vmm is achieved. The effect of carrier lifetime variation...

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Effect of carrier lifetime on forward-biased silicon Mach-Zehnder modulators

High-fill-factor, burst-frame-rate charge-coupled device

August 3, 2003
  |
Conference Paper
Author:
Robert K. Reich
…
Published in:
SPIE Vol. 5210, Ultrahigh- and High-Speed Photography, Photonics, and Videography, 3-8 August 2003, pp. 95-104.
Topic:
electronics
R&D area:
R&D group:

Summary

A 512x512-element, multi-frame charge-coupled device (CCD) has been developed for collecting four sequential image frames at megahertz rates. To operate at fast frame rates with high sensitivity, the imager uses an electronic shutter technology developed for back-illuminated CCDs. Device-level simulations were done to estimate the CCD collection well spaces for sub-microsecond photoelectron collection times. Also required for the high frame rates were process enhancements that included metal strapping of the polysilicon gate electrodes and a second metal layer. Tests on finished back-illuminated CCD imagers have demonstrated sequential multi-frame capture capability with integration intervals in the hundreds of nanoseconds range.
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Summary

A 512x512-element, multi-frame charge-coupled device (CCD) has been developed for collecting four sequential image frames at megahertz rates. To operate at fast frame rates with high sensitivity, the imager uses an electronic shutter technology developed for back-illuminated CCDs. Device-level simulations were done to estimate the CCD collection well spaces for...

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High-fill-factor, burst-frame-rate charge-coupled device

High-speed, electronically shuttered solid-state imager technology

July 8, 2002
  |
Conference Paper
Author:
Robert K. Reich
…
Published in:
Rev. Sci. Instrum. Vol. 74, No. 3, Pt. II, March 2003, pp. 2027-2031 (Proceedings of the 14th Topical Conference on High-Temperature Plasma Diagnostics, 8-11 July 2002)
Topic:
electronics
R&D area:
R&D group:

Summary

Electronically shuttered solid-state imagers are being developed for high-speed imaging applications. A 5 cmx5 cm, 512x512-element, multiframe charge-coupled device (CCD) imager has been fabricated for the Los Alamos National Laboratory DARHT facility that collects four sequential image frames at megahertz rates. To operate at fast frame rates with high sensitivity, the imager uses an electronic shutter technology designed for back-illuminated CCDs. The design concept and test results are described for the burst-frame-rate imager. Also discussed is an evolving solid-state imager technology that has interesting characteristics for creating large-format x-ray detectors with short integration times (100 ps to 1 ns). Proposed device architectures use CMOS technology for high speed sampling (tens of picoseconds transistor switching times). Techniques for parallel clock distribution, that triggers the sampling of x-ray photoelectrons, will be described that exploit features of CMOS technology.
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Summary

Electronically shuttered solid-state imagers are being developed for high-speed imaging applications. A 5 cmx5 cm, 512x512-element, multiframe charge-coupled device (CCD) imager has been fabricated for the Los Alamos National Laboratory DARHT facility that collects four sequential image frames at megahertz rates. To operate at fast frame rates with high sensitivity...

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High-speed, electronically shuttered solid-state imager technology
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