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Geiger-mode quad-cell array for adaptive optics

May 7, 2008
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Conference Paper
Author:
Brian F. Aull
…
Published in:
CLEO-QELS, 2008 Conf. on Lasers and Electro-Optics/Quantum Electronics and Laser Science Conf., 4-9 May 2008.
Topic:
optics
R&D area:
R&D group:

Summary

We report an array of Shack-Hartmann wavefront sensors using high-fill-factor Geiger-mode avalanche detector quad cells hybridized to all-digital CMOS counting circuits. The absence of readout noise facilitates fast wavefront sensing at low light levels.
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Summary

We report an array of Shack-Hartmann wavefront sensors using high-fill-factor Geiger-mode avalanche detector quad cells hybridized to all-digital CMOS counting circuits. The absence of readout noise facilitates fast wavefront sensing at low light levels.

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Geiger-mode quad-cell array for adaptive optics

Advanced trigger development

November 1, 2007
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Journal Article
Author:
Thomas H. Jeys
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Published in:
Lincoln Laboratory Journal, Vol. 17, No. 1, November 2007, pp. 29-62.
Topic:
detection systems
R&D area:
R&D group:

Summary

The deadliest form of a biological attack is aerosolized agents dispersed into the atmosphere. Early detection of aerosolized biological agents is important for defense against these agents. Because of the wide range of possible attack scenarios and attack responses, there is also a wide range of detector requirements. This article focuses on real-time, single-particle, optically based bio-agent trigger detectors--the first responder to an aerosol attack--and how to engineer these detectors to achieve optimal detection performance.
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Summary

The deadliest form of a biological attack is aerosolized agents dispersed into the atmosphere. Early detection of aerosolized biological agents is important for defense against these agents. Because of the wide range of possible attack scenarios and attack responses, there is also a wide range of detector requirements. This article...

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Advanced trigger development

Back-illuminated three-dimensionally integrated CMOS image sensors for scientific applications

August 27, 2007
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Conference Paper
Author:
Vyshnavi Suntharalingam
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Published in:
SPIE Vol. 6690, Focal Plane Arrays for Space Telescopes III, 27-28 August 2007, 669009.
Topic:
sensors
R&D area:
R&D group:

Summary

SOI-based active pixel image sensors have been built in both monolithic and vertically interconnected pixel technologies. The latter easily supports the inclusion of more complex pixel circuitry without compromising pixel fill factor. A wafer-scale back-illumination process is used to achieve 100% fill factor photodiodes. Results from 256 x 256 and 1024 x 1024 pixel arrays are presented, with discussion of dark current improvement in the differing technologies.
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Summary

SOI-based active pixel image sensors have been built in both monolithic and vertically interconnected pixel technologies. The latter easily supports the inclusion of more complex pixel circuitry without compromising pixel fill factor. A wafer-scale back-illumination process is used to achieve 100% fill factor photodiodes. Results from 256 x 256 and...

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Back-illuminated three-dimensionally integrated CMOS image sensors for scientific applications

Analysis of ground surveillance assets to support Global Hawk airspace access at Beale Air Force Base

August 10, 2007
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Project Report
Author:
Randall T. Wiken
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Published in:
Project Report ATC-335, MIT Lincoln Laboratory
Topic:
air traffic control
R&D area:
R&D group:

Summary

This study, performed from May 2006 to January 2007 by MIT Lincoln Laboratory, investigated the feasibility of providing ground-sensor-based traffic data directly to Global Hawk operators at Beale AFB. The system concept involves detecting and producing tracks for all cooperative (transponder-equipped) and non-cooperative aircraft from the surface to 18,000 ft MSL, extending from the Beale AFB Class C airspace cylinder northward to the China Military Operations Area (MOA). Data from multiple sensors can be fused together to create a comprehensive air surveillance picture, with the altitudes of non-cooperative targets estimated by fusing returns from all available sensor data. Such a capability, if accepted by the FAA, could mitigate the need for Temporary Flight Restrictions (TFR) to satisfy Certificate of Waiver or Authorization (COA) requirements. There are no existing specifications for ground-sensor-based Unmanned Aerial Systems (UAS) traffic avoidance procedures, nor is it yet known how precisely altitude needs to be estimated. It may be possible to avoid traffic laterally, in which case traffic altitude need not be known accurately. If, however, it is necessary to also avoid traffic vertically, then altitudes will need to be estimated to some (as yet undefined) level of accuracy.
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Summary

This study, performed from May 2006 to January 2007 by MIT Lincoln Laboratory, investigated the feasibility of providing ground-sensor-based traffic data directly to Global Hawk operators at Beale AFB. The system concept involves detecting and producing tracks for all cooperative (transponder-equipped) and non-cooperative aircraft from the surface to 18,000 ft...

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Analysis of ground surveillance assets to support Global Hawk airspace access at Beale Air Force Base

Enhanced regional situational awareness

June 1, 2007
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Journal Article
Author:
Curtis W. Davis III
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Published in:
Lincoln Laboratory Journal, Vol. 16, No. 2, June 2007, pp. 355-380.
Topic:
aircraft
R&D area:
R&D group:

Summary

Airspace protection in the capital area is provided by an Integrated Air Defense System (IADS) created through the coordinated response of U.S. government and local law-enforcement agencies, including the Department of Defense, the Department of Homeland Security, the Federal Aviation Administration, and the Capitol Police. The IADS includes U.S. Coast Guard helicopters, fighter aircraft, and airborne early-warning aircraft cued by surveillance radars. Under Operation Noble Eagle, the response to a threat includes warning flares deployed from fighter aircraft and, ultimately, the use of surface and air-launched missiles. Selecting the appropriate response requires a means for rapidly assessing the aircraft threat. New and existing sensors must be simultaneously cued to the target of interest and integrated with existing sources of information to display a common-air-picture display to support the decision makers. This article describes the development of an Enhanced Regional Situation Awareness system, an integrated sensing and decision support system developed for the complex and busy airspace surrounding the National Capital Region.
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Summary

Airspace protection in the capital area is provided by an Integrated Air Defense System (IADS) created through the coordinated response of U.S. government and local law-enforcement agencies, including the Department of Defense, the Department of Homeland Security, the Federal Aviation Administration, and the Capitol Police. The IADS includes U.S. Coast...

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Enhanced regional situational awareness

CMOS detector technology

December 6, 2005
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Journal Article
Author:
Alan Hoffman
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Published in:
Exp. Astron., Vol. 19, No. 1-3, 2005, pp. 111-34.
Topic:
sensors
R&D area:

Summary

An entry level overview of state-of-the-art CMOS detector technology is presented. Operating principles and system architecture are explained in comparison to the well-established CCD technology, followed by a discussion of important benefits of modern CMOS-based detector arrays. A number of unique CMOS features including different shutter modes and scanning concepts are described. In addition, sub-field stitching is presented as a technique for producing very large imagers. After a brief introduction to the concept of monolithic CMOS sensors, hybrid detectors technology is introduced. A comparison of noise reduction methods for CMOS hybrids is presented. The final sections review CMOS fabrication processes for monolithic and vertically integrated image sensors.
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Summary

An entry level overview of state-of-the-art CMOS detector technology is presented. Operating principles and system architecture are explained in comparison to the well-established CCD technology, followed by a discussion of important benefits of modern CMOS-based detector arrays. A number of unique CMOS features including different shutter modes and scanning concepts...

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CMOS detector technology

Design and testing of an all-digital readout integrated circuit for infrared focal plane arrays

August 3, 2005
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Conference Paper
Author:
Michael W. Kelly
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Published in:
SPIE Vol. 5902. Focal Plane Arrays for Space Telescopes II, 3-4 August 2005, pp. 1-11.
Topic:
sensors
R&D area:
R&D group:

Summary

The digital focal plane array (DFPA) project demonstrates the enabling technologies necessary to build readout integrated circuits for very large infrared focal plane arrays (IR FPAs). Large and fast FPAs are needed for a new class of spectrally diverse sensors. Because of the requirement for high-resolution (low noise) sampling, and because of the sample rate needed for rapid acquisition of high-resolution spectra, it is highly desirable to perform analog-to-digital (A/D) conversion right at the pixel level. A dedicated A/D converter located under every pixel in a one-million-plus element array, and all-digital readout integrated circuits will enable multi- and hyper-spectral imaging systems with unprecedented spatial and spectral resolution and wide area coverage. DFPAs provide similar benefits to standard IR imaging systems as well. We have addressed the key enabling technologies for realizing the DFPA architecture in this work. Our effort concentrated on demonstrating a 60-micron footprint, 14-bit A/D converter and 2.5 Gbps, 16:1 digital multiplexer, the most basic components of the sensor. The silicon test chip was fabricated in a 0.18- micron CMOS process, and was designed to operate with HgxCd1-xTe detectors at cryogenic temperatures. Two A/D designs, one using static logic and one using dynamic logic, were built and tested for performance and power dissipation. Structures for evaluating the bit-error-rate of the multiplexer on-chip and through a differential output driver were implemented for a complete performance assessment. A unique IC probe card with fixtures to mount into an evacuated, closed-cycle helium dewar were also designed for testing up to 2.5 Gbps at temperatures as low as 50 K.
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Summary

The digital focal plane array (DFPA) project demonstrates the enabling technologies necessary to build readout integrated circuits for very large infrared focal plane arrays (IR FPAs). Large and fast FPAs are needed for a new class of spectrally diverse sensors. Because of the requirement for high-resolution (low noise) sampling, and...

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Design and testing of an all-digital readout integrated circuit for infrared focal plane arrays

Megapixel CMOS image sensor fabricated in three-dimensional integrated circuit technology

June 19, 2005
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Conference Paper
Author:
Vyshnavi Suntharalingam
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Published in:
2005 IEEE Int. Solid-Stat Circuits Conf. Digest of Technical Papers, Pt.1, 19-25 June 2005, p. 356-357.
Topic:
integrated circuit
R&D area:
R&D group:

Summary

In this paper a 3D integrated 1024x1024, 8um pixel visible image sensor fabricated with oxide-to-oxide wafer bonding and 2-um square 3-D-vias in every pixel is presented. The 150mm wafer technology integrates a low-leakage, deep-depletion, 100% fill factor photodiode layer to a 3.3-V, 0.35-um gate length fully depleted (FD) SOI CMOS readout circuit layer.
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Summary

In this paper a 3D integrated 1024x1024, 8um pixel visible image sensor fabricated with oxide-to-oxide wafer bonding and 2-um square 3-D-vias in every pixel is presented. The 150mm wafer technology integrates a low-leakage, deep-depletion, 100% fill factor photodiode layer to a 3.3-V, 0.35-um gate length fully depleted (FD) SOI CMOS...

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Megapixel CMOS image sensor fabricated in three-dimensional integrated circuit technology

Next-generation technologies to enable sensor networks

July 1, 2004
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Book Chapter
Author:
Joel I. Goodman
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Published in:
Handbook of Sensor Networks, Chapter 2
Topic:
sensors
R&D area:
R&D group:

Summary

Examples are advances in ground moving target indicator (GMTI) processing, space-time adaptive processing (STAP), target discrimination, and electronic counter-countermeasures (ECCM). All these advances have improved the capabilities of radar sensors. Major improvements expected in the next several years will come from exploiting collaborative network-centric architectures to leverage synergies among individual sensors. Such an approach has become feasible as a result of major advances in network computing, as well as communication technologies in both wireless and fiber networks. The exponential growth of digital technology, together with highly capable networks, enable in-depth exploitation of sensor synergy, including multi-aspect sensing. New signal processing algorithms exploiting multi-sensor data have been demonstrated in non-real-time, achieving improved performance against surface mobile targets by leveraging high-speed sensor networks. The paper demonstrates a significant advancement in exploiting complex ground moving target indicator (GMTI) and synthetic aperture radar (SAR) data to accurately geo-locate and identify mobile targets.
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Summary

Examples are advances in ground moving target indicator (GMTI) processing, space-time adaptive processing (STAP), target discrimination, and electronic counter-countermeasures (ECCM). All these advances have improved the capabilities of radar sensors. Major improvements expected in the next several years will come from exploiting collaborative network-centric architectures to leverage synergies among individual...

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Next-generation technologies to enable sensor networks

Dynamic response of an electronically shuttered CCD imager

June 1, 2004
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Journal Article
Author:
Dennis D. Rathman
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Published in:
IEEE. Trans. Electron Devices, Vol. 51, No. 6, June 2004, pp. 864-869.
Topic:
sensors
R&D area:
R&D group:

Summary

The dynamic response of an electronically shuttered charge-coupled device (CCD) imager to nanosecond voltage pulses has been investigated. Measurements show that the shutter can be dynamically opened and closed in nanosecond times. For the shutter opening, simulations indicate that the collection of photoelectrons occurs in times much shorter than that needed to form the steady-state depletion region under the CCD well. In addition, the shutter closing occurs faster than the reconstitution of the p-buried (shutter) layer. Simulations further indicate that electric fields created in the neutral substrate by the shutter clocks enable photogenerated charge collection/rejection on nanosecond time scales despite the fact that the depletion-region formation and collapse take much longer times.
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Summary

The dynamic response of an electronically shuttered charge-coupled device (CCD) imager to nanosecond voltage pulses has been investigated. Measurements show that the shutter can be dynamically opened and closed in nanosecond times. For the shutter opening, simulations indicate that the collection of photoelectrons occurs in times much shorter than that...

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Dynamic response of an electronically shuttered CCD imager
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