Four-Sample High-Burst-Rate Charge-Coupled Device

The electronic shutter developed at Lincoln Laboratory has enabled a device of unique sensitivity and speed that has on-chip multiframe storage capability. The goals for this device were

  • Multiframe strobe imager
    • Capture four sequential frames, one frame every ~650 ns
  • Extinction ratio (photons collected with shutter open/shutter closed) and frame isolation (multiframe operation) goal >2000 at ~450 nm light input

  • Sensitivity
    • ~100% fill factor
    • High quantum efficiency (40% to 60% at ~450 nm)
    • Low readout noise <5 e- rms
  • Device resolution: 512 × 512-pixels/~100 µm pixels

  • Other performance parameters: charge transfer efficiency, dynamic range, binning, linearity

The device uses a superpixel composed of four imaging pixels, one of which is used for each of four frames.

Figure 1. Selective opening of electronic shutter provides fast operation and good isolation of data between frames.Figure 1. Selective opening of electronic shutter provides fast operation and good isolation of data between frames.

Figure 1 represents a cross section of the device showing the depletion region for the subpixels during each of the four frames that are to be exposed. During frame 1, the gate associated with the charge storage well for that frame is raised to a high potential, causing the depletion region (red) to reach through the electronic shutter buried layer (orange). At the close of this frame, the gate is moved to an intermediate voltage, as discussed in the explanation of the electronic shutter. This process is repeated for each of the four frames.

One unusual aspect of this device is that it has ~100% fill factor. Each pixel is able to collect photoelectrons from every part of the pixel.

Extensive 3D modeling and also measurements confirm that photoelectrons from the entire pixel area are captured with high efficiency for each of the frames, allowing us to meet the stringent performance specifications for this device.

Figure 2 shows three burst-rate imagers on a 150 mm wafer. Figure 3 is a close-up view of the circuitry of the charge-coupled device (CCD) in the region near the output of the device.

Figure 2. 150 mm wafer with three four-sample CCDs.Figure 2. A 150 mm wafer with three four-sample CCDs.
Figure 3. Close-up microphotograph of output registers of four-sample CCD.Figure 3. Close-up microphotograph of output registers of four-sample CCD.

The camera electronics driving the electronic shutter needed to be designed carefully in order to achieve the speed inherent in the device itself. We have built a cryostat-based camera (cold head shown in Figure 4) capable of meeting the expected performance.  The multiple feed-throughs near the device were necessary to limit the resistance to enable high transient current.

Figure 4. Cold head of four-sample high-speed camera; view with vacuum window removed.Figure 4. Cold head of four-sample high-speed camera; view with vacuum window removed.
Figure 5. Side view of cold head of four-sample high-speed camera. Note the multiple vacuum electrical feed-through posts for driving the electronic shutter.Figure 5. Side view of cold head of four-sample high-speed camera. Note the multiple vacuum electrical feed-through posts for driving the electronic shutter.

 

 

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