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A nanoparticle convective directed assembly process for the fabrication of periodic surface enhanced Raman spectroscopy substrates

Summary

A highly scalable approach for producing surface-enhanced Raman spectroscopy substrates is introduced. The novel method involves assembling individual nanoparticles in pre-defined templates, one particle per template, forming a high denisity of nanogaps over large areas, while decoupling nanostructure synthesis from placement.
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Summary

A highly scalable approach for producing surface-enhanced Raman spectroscopy substrates is introduced. The novel method involves assembling individual nanoparticles in pre-defined templates, one particle per template, forming a high denisity of nanogaps over large areas, while decoupling nanostructure synthesis from placement.

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Monolithic 3.3V CCD/SOI-CMOS Imager Technology

Summary

We have developed a merged CCD/SOI-CMOS technology that enables the fabrication of monolithic, low-power imaging systems on a chip. The CCD's, fabricated in the bulk handle wafer, have charge-transfer inefficiencies of about 1x10(-5) and well capacities of more than 100,000 electrons with 3.3-V clocks and 8x8um pixels. Fully depleted 0.35pm SOI-CMOS ring oscillators have stage delay of 48ps at 3.3V. We demonstrate for the first time an integrated image sensor with charge-domain A/D conversion and on-chip clocking.
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Summary

We have developed a merged CCD/SOI-CMOS technology that enables the fabrication of monolithic, low-power imaging systems on a chip. The CCD's, fabricated in the bulk handle wafer, have charge-transfer inefficiencies of about 1x10(-5) and well capacities of more than 100,000 electrons with 3.3-V clocks and 8x8um pixels. Fully depleted 0.35pm...

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