Chenson K. Chen
Dr. Chenson K. Chen is a technical staff member in the Advanced Imagers and Silicon Technology Group, developing low-power fully-depleted silicon-on-insulator CMOS and demonstrating heterogeneous three-dimensional (3D) circuit-integration process technologies. Previously, as a member of the Electronic Materials Group, his research focused on silicon-on-insulator materials development and PtSi, IrSi, and GeSi molecular beam epitaxy for infrared detector applications.
Most recently, Chen has led an effort to fabricate large-format single-photon-sensitive imaging arrays, requiring 3D integration of custom low-leakage high-voltage CMOS readout and single-photon sensitive avalanche-photodiode circuits, all fabricated in Lincoln Laboratory's Microelectronics Laboratory. Over the past decade, he has led a team to develop a 3D integration process, establishing a precision-aligned wafer-to-wafer oxide-bonding process while demonstrating the highest density of circuit-to-circuit 3D vertical interconnects in the semiconductor industry.
Chen has coauthored a number of papers on 3D integration, including invited presentations, "3D-Enabled Heterogeneous Integrated Circuits" at the 2013 IEEE S3S Conference and "SOI-Enabled 3D Integrated Circuit Technology" at the 2011 International Conference on Technology and Instrumentation in Particle Physics.
Chen received an AB degree in physics and chemistry, and a PhD degree in physics, all from the University of California, Berkeley. His graduate student research focused on interfacial nonlinear optics, including surface coherent anti-Stokes Raman spectroscopy (Surface CARS) and second harmonic generation on roughened metal surfaces.