Jakub T. Kedzierski
Dr. Jakub T. Kedzierski is a senior staff member in the Chemical, Microsystem, and Nanoscale Technology Group. At Lincoln Laboratory, he has led the work on low-power electronics, two-dimensional electronic materials, and microfluidics. He served as the assistant group leader in the Advanced Silicon Technology Group, where he designed an ultralow-power subthreshold CMOS technology, built one of the world's first top-gated graphene transistors, and helped to initiate the microfluidic research program in the Advanced Technology Division.
Prior to joining the Laboratory, Dr. Kedzierski worked at the IBM T. J. Watson Research Center, where he studied advanced electronic devices, metal-gate integration, and technology scaling.
Dr. Kedzierski has served on the International Electron Devices Meeting process committee, and received the IEEE Electron Devices Society's Paul Rappaport and George Smith Awards for best paper in 2001 and 2009, respectively. He has served as a visiting professor at the Indian Institute of Technology in Bombay, teaching nanoelectronics. He has authored or coauthored more than 60 publications.
Dr. Kedzierski received his PhD degree in electrical engineering from the University of California at Berkeley in 2001, where he co-invented the FinFET transistor, a technology currently adopted for advanced logic electronics by Intel and Taiwan Semiconductor Manufacturing Company (TSMC).