The digital focal plane array (DFPA) architecture for data processing "on-chip"
The digital focal plane array (DFPA) project seeks to develop readout integrated circuits (ROICs) utilizing aggressively scaled and commercially available CMOS. Along with focal plane scaling and readout robustness benefits, the DFPA architecture provides a very simple way to implement processing algorithms directly on image data, in real-time, and prior to read-out of the data to an external digitizer or computer. In principle, almost any linear image processing filter kernel can be convolved with the scene image prior to readout. The useful size of the filter kernel is only limited by the size of the DFPA. Time domain filters can also be implemented on the ROIC to accomplish digital time domain integration (TDI) or change detection algorithms. The unique architecture can achieve the processing capability without the use of traditional digital adders or multipliers, like those used in most signal processors. Instead, a DFPA manipulates sequential digital counters under every pixel in a unique way to achieve the desired functionality. A non-addressable readout scheme is used for data transfer in four possible directions across the array. Although we are currently targeting longwave infrared (LWIR) applications, the approach can be potentially applied to any imaging application in any band.