MIT Lincoln Laboratory, under sponsorship from the Federal Aviation Adminstration (FAA), is conducting a program to replace/upgrade the existing ASR-9 array signal processor (ASP) and associated algorithms to improve performance and future maintainability. The ASR-9 processor augmentation card (9-PAC) replaces the ASP four-board set with a single card containing three TMS320c40 processors and 32 Megabytes of memory. The resulting increase in both processing speed and memory size allows more sophisticated beacon and radar processing algorithms to be implemented. The majority of the improvement to the radar correlation and interpolation (C&I) function lies in the area of geocensoring and adaptive thresholding, where the larger memory capacity of the 9-PAC allows more detailed maps to be maintained. A dynamic road map mechanism has been implemented to reduce the need for manual tuning of the system when the radars are first installed or when new road construction occurs. The map is twice the resolution of the original geocensormap, resulting in a decrease in total area desensitized to radar-only targets. In addition, the new geocensor mechanism makes use of target amplitude information, allowing aircraft with amplitudes significantly greater than the road traffic returns at a particular cell to pass through uncensored. The adaptive thresholding cell geometry has been modified so that adaptive map cells now overlap one another, eliminating the false target breakthrough that occurs in the present system when regions of false alarms due to birds or weather transition from one cell to the next. The entire C & I function has been recorded in a high-level language (ANSI-C), allowing it to be easily ported between platforms and better facilitating off-line analysis.