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Improvement of SOI MOSFET RF performance by implant optimization

Published in:
IEEE Microw. Wirel. Compon. Lett., Vol. 20, No. 5, May 2010, pp. 271-273.

Summary

The characteristics of silicon on insulator MOSFETs are modified to enhance the RF performance by varying channel implants. Without adding new masks or fabrication steps to the standard CMOS process, this approach can be easily applied in standard foundry fabrication. The transconductance, output resistance, and breakdown voltage can be increased by eliminating channel and drain extension implants. As a result, the fmax of the modified n-MOSFET with a 150 nm gate length exceeds 120 GHz, showing a 20% improvement over the standard MOSFET for digital circuits on the same wafer.
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Summary

The characteristics of silicon on insulator MOSFETs are modified to enhance the RF performance by varying channel implants. Without adding new masks or fabrication steps to the standard CMOS process, this approach can be easily applied in standard foundry fabrication. The transconductance, output resistance, and breakdown voltage can be increased...

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Channel engineering of SOI MOSFETs for RF applications

Summary

Channel engineering of SOI MOSFETs is explored by altering ion implantation without adding any new fabrication steps to the standard CMOS process. The effects of implantation on characteristics important for RF applications, such as transconductance, output resistance, breakdown voltage, are compared. Data show that the best overall RF MOSFET has no body and drain-extension implants.
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Summary

Channel engineering of SOI MOSFETs is explored by altering ion implantation without adding any new fabrication steps to the standard CMOS process. The effects of implantation on characteristics important for RF applications, such as transconductance, output resistance, breakdown voltage, are compared. Data show that the best overall RF MOSFET has...

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Graphene-on-insulator transistors made using C on Ni chemical-vapor deposition

Published in:
IEEE Electron Device Lett., Vol. 30, No. 7, July 2009, pp. 745-747.
Topic:

Summary

Graphene transistors are made by transferring a thin graphene film grown on Ni onto an insulating SiO2 substrate. The properties and integration of these graphene-on-insulator transistors are presented and compared to the characteristics of devices made from graphitized SiC and exfoliated graphene flakes.
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Summary

Graphene transistors are made by transferring a thin graphene film grown on Ni onto an insulating SiO2 substrate. The properties and integration of these graphene-on-insulator transistors are presented and compared to the characteristics of devices made from graphitized SiC and exfoliated graphene flakes.

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Epitaxial graphene transistors on SiC substrates

Published in:
IEEE Trans. Electron Devices, Vol. 55, No. 8, August 2008, pp. 2078-2085.

Summary

This paper describes the behavior of top-gated transistors fabricated using carbon, specifically epitaxial graphene on SiC, as the active material. Although graphene devices have been built before, in this paper, we provide the first demonstration and systematic evaluation of arrays of a large number of transistors produced using standard microelectronics methods. The graphene devices presented feature high-k dielectric, mobilities up to 5000 cm2/V · s, and Ion/Ioff ratios of up to seven, and are methodically analyzed to provide insight into the substrate properties. Typical of graphene, these micrometer-scale devices have negligible band gaps and, therefore, large leakage currents.
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Summary

This paper describes the behavior of top-gated transistors fabricated using carbon, specifically epitaxial graphene on SiC, as the active material. Although graphene devices have been built before, in this paper, we provide the first demonstration and systematic evaluation of arrays of a large number of transistors produced using standard microelectronics...

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