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Analog coupled oscillator based weighted Ising machine

October 15, 2019
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Journal Article
Author:
Jeffrey B. Chou
…
Published in:
Sci. Rep., Vol. 9, No. 1, 15 October 2019, 14786.
Topic:
computing
R&D area:
R&D group:

Summary

We report on an analog computing system with coupled non-linear oscillators which is capable of solving complex combinatorial optimization problems using the weighted Ising model. The circuit is composed of a fully-connected 4-node LC oscillator network with low-cost electronic components and compatible with traditional integrated circuit technologies. We present the theoretical modeling, experimental characterization, and statistical analysis our system, demonstrating single-run ground state accuracies of 98% on randomized MAX-CUT problem sets with binary weights and 84% with 5-bit weight resolutions. Solutions are obtained within 5 oscillator cycles, and the time-to-solution has been demonstrated to scale directly with oscillator frequency. We present scaling analysis which suggests that large coupled oscillator networks may be used to solve computationally intensive problems faster and more efficiently than conventional algorithms. The proof-of-concept system presented here provides the foundation for realizing such larger scale systems using existing hardware technologies and could pave the way towards an entirely novel computing paradigm.
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Summary

We report on an analog computing system with coupled non-linear oscillators which is capable of solving complex combinatorial optimization problems using the weighted Ising model. The circuit is composed of a fully-connected 4-node LC oscillator network with low-cost electronic components and compatible with traditional integrated circuit technologies. We present the...

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Analog coupled oscillator based weighted Ising machine

Multi-Objective Graph Matching via Signal Filtering

October 11, 2019
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Journal Article
Author:
Daniel L. Sussman
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Published in:
IEEE Signal Processing Magazine Special Issue on GSP [submitted]
Topic:
graph processing
R&D area:
R&D group:

Summary

In this white paper we propose a new method which exploits tools from graph signal processing to solve the graph matching problem, the problem of estimating the correspondence between the vertex sets of two graphs. We recast the graph matching problem as matching multiple similarity matrices where the similarities are computed between filtered signals unique to eachnode. Using appropriate graph filters, these similarity matrices can emphasize long or short range behavior and the method will implicitly search for similarities between the graphs and at multiple scales. Our method shows substantial improvementsover standard methods which use the raw adjacency matrices, especially in low-information environments.
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Summary

In this white paper we propose a new method which exploits tools from graph signal processing to solve the graph matching problem, the problem of estimating the correspondence between the vertex sets of two graphs. We recast the graph matching problem as matching multiple similarity matrices where the similarities are...

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Multi-Objective Graph Matching via Signal Filtering

An Eye on the Storm: Tracking Power Outages via the Internet of Things

October 4, 2019
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Conference Paper
Author:
Kendra J. Kratkiewicz
Published in:
Grace Hopper Celebration 2019 [submitted]
Topic:
microgrids
R&D area:
R&D group:

Summary

Assessing the extent of power outages in the wake of disasters is a crucial but daunting challenge. We developed a prototype to estimate and map the severity and location of power outages throughout an event by taking advantage of IoT as a non-traditional power-sensing network. We present results used by FEMA and other responders during multiple major hurricanes, such as Harvey, Irma, and Maria.
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Summary

Assessing the extent of power outages in the wake of disasters is a crucial but daunting challenge. We developed a prototype to estimate and map the severity and location of power outages throughout an event by taking advantage of IoT as a non-traditional power-sensing network. We present results used by...

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An Eye on the Storm: Tracking Power Outages via the Internet of Things

Design, simulation, and fabrication of three-dimensional microsystem components using grayscale photolithography

October 1, 2019
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Journal Article
Author:
Melissa A. Smith
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Published in:
J. Micro/Nanolith., Vol. 18, No. 4, October - December 2019, 043507.
Topic:
lithography
R&D area:
R&D group:

Summary

Grayscale lithography is a widely known but underutilized microfabrication technique for creating three-dimensional (3-D) microstructures in photoresist. One of the hurdles for its widespread use is that developing the grayscale photolithography masks can be time-consuming and costly since it often requires an iterative process, especially for complex geometries. We discuss the use of PROLITH, a lithography simulation tool, to predict 3-D photoresist profiles from grayscale mask designs. Several examples of optical microsystems and microelectromechanical systems where PROLITH was used to validate the mask design prior to implementation in the microfabrication process are presented. In all examples, PROLITH was able to accurately and quantitatively predict resist profiles, which reduced both design time and the number of trial photomasks, effectively reducing the cost of component fabrication.
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Summary

Grayscale lithography is a widely known but underutilized microfabrication technique for creating three-dimensional (3-D) microstructures in photoresist. One of the hurdles for its widespread use is that developing the grayscale photolithography masks can be time-consuming and costly since it often requires an iterative process, especially for complex geometries. We discuss...

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Design, simulation, and fabrication of three-dimensional microsystem components using grayscale photolithography

Uncovering human trafficking networks through text analysis

October 1, 2019
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Conference Paper
Author:
Lin Li
Published in:
2019 Grace Hopper Celebration, 1-4 October 2019.
Topic:
algorithms
R&D area:
R&D group:

Summary

Human trafficking is a form of modern-day slavery affecting an estimated 40 million victims worldwide, primarily through the commercial sexual exploitation of women and children. In the last decade, the advertising of victims has moved from the streets to websites on the Internet, providing greater efficiency and anonymity for sex traffickers. This shift has allowed traffickers to list their victims in multiple geographic areas simultaneously, while also improving operational security by using multiple methods of electronic communication with buyers; complicating the ability of law enforcement to disrupt these illicit organizations. In this presentation, we present a novel unsupervised template matching algorithm for analyzing and detecting complex organizations operating on adult service websites. We apply this method to a large corpus of adult service advertisements retrieved from backpage.com, and show that the networks identified through the algorithm match well with surrogate truth data derived from phone number networks in the same corpus. Further exploration of the results show that the proposed method provides deeper insights into the complex structures of sex trafficking organizations, not possible through networks derived from phone numbers alone. This method provides a powerful new capability for law enforcement to more completely identify and gather evidence about trafficking operations
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Summary

Human trafficking is a form of modern-day slavery affecting an estimated 40 million victims worldwide, primarily through the commercial sexual exploitation of women and children. In the last decade, the advertising of victims has moved from the streets to websites on the Internet, providing greater efficiency and anonymity for sex...

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Uncovering human trafficking networks through text analysis

Survey and benchmarking of machine learning accelerators

September 24, 2019
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Conference Paper
Author:
Albert I. Reuther
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Published in:
IEEE High Performance Extreme Computing Conf., HPEC, 24-26 September 2019.
Topic:
machine learning
R&D area:
R&D group:

Summary

Advances in multicore processors and accelerators have opened the flood gates to greater exploration and application of machine learning techniques to a variety of applications. These advances, along with breakdowns of several trends including Moore's Law, have prompted an explosion of processors and accelerators that promise even greater computational and machine learning capabilities. These processors and accelerators are coming in many forms, from CPUs and GPUs to ASICs, FPGAs, and dataflow accelerators. This paper surveys the current state of these processors and accelerators that have been publicly announced with performance and power consumption numbers. The performance and power values are plotted on a scatter graph and a number of dimensions and observations from the trends on this plot are discussed and analyzed. For instance, there are interesting trends in the plot regarding power consumption, numerical precision, and inference versus training. We then select and benchmark two commercially-available low size, weight, and power (SWaP) accelerators as these processors are the most interesting for embedded and mobile machine learning inference applications that are most applicable to the DoD and other SWaP constrained users. We determine how they actually perform with real-world images and neural network models, compare those results to the reported performance and power consumption values and evaluate them against an Intel CPU that is used in some embedded applications.
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Summary

Advances in multicore processors and accelerators have opened the flood gates to greater exploration and application of machine learning techniques to a variety of applications. These advances, along with breakdowns of several trends including Moore's Law, have prompted an explosion of processors and accelerators that promise even greater computational and...

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Survey and benchmarking of machine learning accelerators

Large scale parallelization using file-based communications

September 24, 2019
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Conference Paper
Author:
Chansup Byun
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Published in:
2019 IEEE High Performance Computing Conf., HPEC, 24-26 September 2019.
Topic:
high performance computing
R&D area:
R&D group:

Summary

In this paper, we present a novel and new file-based communication architecture using the local filesystem for large scale parallelization. This new approach eliminates the issues with filesystem overload and resource contention when using the central filesystem for large parallel jobs. The new approach incurs additional overhead due to inter-node message file transfers when both the sending and receiving processes are not on the same node. However, even with this additional overhead cost, its benefits are far greater for the overall cluster operation in addition to the performance enhancement in message communications for large scale parallel jobs. For example, when running a 2048-process parallel job, it achieved about 34 times better performance with MPI_Bcast() when using the local filesystem. Furthermore, since the security for transferring message files is handled entirely by using the secure copy protocol (scp) and the file system permissions, no additional security measures or ports are required other than those that are typically required on an HPC system.
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Summary

In this paper, we present a novel and new file-based communication architecture using the local filesystem for large scale parallelization. This new approach eliminates the issues with filesystem overload and resource contention when using the central filesystem for large parallel jobs. The new approach incurs additional overhead due to inter-node...

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Large scale parallelization using file-based communications

Sparse Deep Neural Network graph challenge

September 24, 2019
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Conference Paper
Author:
Jeremy Kepner
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Published in:
IEEE High Performance Extreme Computing Conf., HPEC, 24-26 September 2019.
Topic:
graph processing
R&D area:
R&D group:

Summary

The MIT/IEEE/Amazon GraphChallenge.org encourages community approaches to developing new solutions for analyzing graphs and sparse data. Sparse AI analytics present unique scalability difficulties. The proposed Sparse Deep Neural Network (DNN) Challenge draws upon prior challenges from machine learning, high performance computing, and visual analytics to create a challenge that is reflective of emerging sparse AI systems. The Sparse DNN Challenge is based on a mathematically well-defined DNN inference computation and can be implemented in any programming environment. Sparse DNN inference is amenable to both vertex-centric implementations and array-based implementations (e.g., using the GraphBLAS.org standard). The computations are simple enough that performance predictions can be made based on simple computing hardware models. The input data sets are derived from the MNIST handwritten letters. The surrounding I/O and verification provide the context for each sparse DNN inference that allows rigorous definition of both the input and the output. Furthermore, since the proposed sparse DNN challenge is scalable in both problem size and hardware, it can be used to measure and quantitatively compare a wide range of present day and future systems. Reference implementations have been implemented and their serial and parallel performance have been measured. Specifications, data, and software are publicly available at GraphChallenge.org.
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Summary

The MIT/IEEE/Amazon GraphChallenge.org encourages community approaches to developing new solutions for analyzing graphs and sparse data. Sparse AI analytics present unique scalability difficulties. The proposed Sparse Deep Neural Network (DNN) Challenge draws upon prior challenges from machine learning, high performance computing, and visual analytics to create a challenge that is...

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Sparse Deep Neural Network graph challenge

Optimizing the visualization pipeline of a 3-D monitoring and management system

September 24, 2019
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Conference Paper
Author:
Rebecca L. Wild
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Published in:
2019 IEEE High Performance Computing Conf., HPEC, 24-26 September 2019.
Topic:
high performance computing
R&D area:
R&D group:

Summary

Monitoring and managing High Performance Computing (HPC) systems and environments generate an ever growing amount of data. Making sense of this data and generating a platform where the data can be visualized for system administrators and management to proactively identify system failures or understand the state of the system requires the platform to be as efficient and scalable as the underlying database tools used to store and analyze the data. In this paper we will show how we leverage Accumulo, d4m, and Unity to generate a 3-D visualization platform to monitor and manage the Lincoln Laboratory Supercomputer systems and how we have had to retool our approach to scale with our systems.
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Summary

Monitoring and managing High Performance Computing (HPC) systems and environments generate an ever growing amount of data. Making sense of this data and generating a platform where the data can be visualized for system administrators and management to proactively identify system failures or understand the state of the system requires...

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Optimizing the visualization pipeline of a 3-D monitoring and management system

Streaming 1.9 billion hyperspace network updates per second with D4M

September 24, 2019
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Conference Paper
Author:
Jeremy Kepner
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Published in:
2019 IEEE High Performance Computing Conf., HPEC, 24-26 September 2019.
Topic:
high performance computing
R&D area:
R&D group:

Summary

The Dynamic Distributed Dimensional Data Model (D4M) library implements associative arrays in a variety of languages (Python, Julia, and Matlab/Octave) and provides a lightweight in-memory database implementation of hypersparse arrays that are ideal for analyzing many types of network data. D4M relies on associative arrays which combine properties of spreadsheets, databases, matrices, graphs, and networks, while providing rigorous mathematical guarantees, such as linearity. Streaming updates of D4M associative arrays put enormous pressure on the memory hierarchy. This work describes the design and performance optimization of an implementation of hierarchical associative arrays that reduces memory pressure and dramatically increases the update rate into an associative array. The parameters of hierarchical associative arrays rely on controlling the number of entries in each level in the hierarchy before an update is cascaded. The parameters are easily tunable to achieve optimal performance for a variety of applications. Hierarchical arrays achieve over 40,000 updates per second in a single instance. Scaling to 34,000 instances of hierarchical D4M associative arrays on 1,100 server nodes on the MIT SuperCloud achieved a sustained update rate of 1,900,000,000 updates per second. This capability allows the MIT SuperCloud to analyze extremely large streaming network data sets.
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Summary

The Dynamic Distributed Dimensional Data Model (D4M) library implements associative arrays in a variety of languages (Python, Julia, and Matlab/Octave) and provides a lightweight in-memory database implementation of hypersparse arrays that are ideal for analyzing many types of network data. D4M relies on associative arrays which combine properties of spreadsheets...

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Streaming 1.9 billion hyperspace network updates per second with D4M
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