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Operational benefits of the Integrated Terminal Weather System (ITWS) at Atlanta

July 15, 2005
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Project Report
Author:
Shawn S. Allan
…
Published in:
MIT Lincoln Laboratory Report ATC-320
Topic:
weather
R&D area:
R&D group:

Summary

This report summarizes the results of an initial study to estimate the yearly delay reduction provided by the initial operational capability (IOC) Integrated Terminal Weather System (ITWS) at Hartsfield-Jackson Atlanta International Airport (ATL). Specific objectives of this initial study were to: (1) analyze convective weather operations at ATL to determine major causes of convective weather delay and how those might be modeled quantitatively. (2) provide estimates of the ATL ITWS delay reduction based on the "Decision/Modeling" method using questionnaires and interviews with Atlanta Terminal Radar Approach Control (TRACON) and Air Route Traffic Control Center (ARTCC) operational ITWS users. (3)assess the "reasonableness" of the model-based delay reduction estimates by comparing those savings with estimates of the actual weather-related arrival delays at ATL. In addition, the reasonableness of model-based delay reduction estimates was assessed by determining the average delay savings per ATL flight during times when adverse convective weather is within the coverage of the ATL ITWS. (4)conduct an exploratory study confirming the ATL ITWS delay savings by comparing Aviation System Performance Metrics (ASPM) database delays pre- and post-ITWS at ATL. (5) assess the accuracy of the "downstream" delay model employed in this study by analyzing ASPM data from a major US airline, and (6) make recommendations for follow-on studies of the ITWS delay reduction at Atlanta and other IOC ITWS facilities. [not complete]
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Summary

This report summarizes the results of an initial study to estimate the yearly delay reduction provided by the initial operational capability (IOC) Integrated Terminal Weather System (ITWS) at Hartsfield-Jackson Atlanta International Airport (ATL). Specific objectives of this initial study were to: (1) analyze convective weather operations at ATL to determine...

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Operational benefits of the Integrated Terminal Weather System (ITWS) at Atlanta

Enhanced detection and classification of buried mines with an UWB multistatic GPR

July 3, 2005
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Conference Paper
Author:
Audrey J. Dumanian
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Published in:
IEEE Antennas and Propagation Society Int. Symp. 2005 Digest, Vol. 3B, 3-8 July 2005, pp. 88-91.
Topic:
detection systems
R&D area:
R&D group:

Summary

In this paper we present a resonance-based classification technique for the identification of plastic-cased antipersonnel (AP) land mines buried in lossy and dispersive soils under rough surfaces by a stepped-frequency ultra-wideband (UWB) downward-looking ground penetrating radar (GPR) with an array of receivers. For this application the multistatic ground probing sensor is positioned just above the ground surface and operates from UHF to C-Band frequencies. Novel physics-based models based on the finite difference frequency domain (FDFD) technique simulate the characteristic resonating multi-aspect target frequency responses for several realistic buried land mine detection scenarios. Matched filter detection results are presented which assess the GPR's performance in identifying a simulated mine buried under a rough surface at varying depths in dry sand and a dispersive clay loam soil from other false targets such as buried rocks.
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Summary

In this paper we present a resonance-based classification technique for the identification of plastic-cased antipersonnel (AP) land mines buried in lossy and dispersive soils under rough surfaces by a stepped-frequency ultra-wideband (UWB) downward-looking ground penetrating radar (GPR) with an array of receivers. For this application the multistatic ground probing sensor...

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Enhanced detection and classification of buried mines with an UWB multistatic GPR

Quantifying convective delay reduction benefits for weather/ATM systems

June 27, 2005
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Conference Paper
Author:
James E. Evans
…
Published in:
USA/Europe Air Traffic Management Seminar, 27-30 June 2005.
Topic:
air traffic control
R&D area:
R&D group:

Summary

This paper investigates methods for quantifying convective weather delay reduction benefits for weather/ATM systems and recommends approaches for future assessments. This topic is particularly important at this time because: 1. Convective weather delays continue to be a dominant factor in the overall National Airspace System (NAS) delays, and 2. Benefits quantification and NAS performance assessment have become very important in an era of significant government and airline budget constraints for civil aviation investments. Quantifying convective weather delay benefits for ATM systems has proven to be quite difficult since the delays arise from complicated, highly variable, poorly understood interactions between convective weather and a very complex aviation system. In this paper, we consider key aspects of convective weather disruptions of the aviation system, how the weather severity can be characterized, and discuss practical experience with benefits quantification by a variety of approaches. The paper concludes with recommendations for a methodology to be used in future convective weather delay reduction quantification studies.
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Summary

This paper investigates methods for quantifying convective weather delay reduction benefits for weather/ATM systems and recommends approaches for future assessments. This topic is particularly important at this time because: 1. Convective weather delays continue to be a dominant factor in the overall National Airspace System (NAS) delays, and 2. Benefits...

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Quantifying convective delay reduction benefits for weather/ATM systems

Safety analysis methodology for unmanned aerial vehicle (UAV) collision avoidance systems

June 27, 2005
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Conference Paper
Author:
James K. Kuchar
Published in:
USA/Europe Air Traffic Management Seminar, 27-30 June 2005.
Topic:
collision avoidance
R&D area:
R&D group:

Summary

The integration of Unmanned Aerial Vehicles (UAVs) into civil airspace requires new methods of ensuring collision avoidance. Concerns over command and control latency, vehicle performance, reliability of autonomous functions, and interoperability of sense-and-avoid systems with the Traffic Alert and Collision Avoidance System (TCAS) and Air Traffic Control must be resolved. This paper describes the safety evaluation process that the international community has deemed necessary to certify such systems. The process focuses on a statistically-valid estimate of collision avoidance performance developed through a combination of airspace encounter modeling, fast-time simulation of the collision avoidance system across millions of encounter scenarios, and system failure and event sensitivity analysis. Example simulation results are provided for an implementation of the analysis process currently being used to evaluate TCAS on the Global Hawk UAV.
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Summary

The integration of Unmanned Aerial Vehicles (UAVs) into civil airspace requires new methods of ensuring collision avoidance. Concerns over command and control latency, vehicle performance, reliability of autonomous functions, and interoperability of sense-and-avoid systems with the Traffic Alert and Collision Avoidance System (TCAS) and Air Traffic Control must be resolved...

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Safety analysis methodology for unmanned aerial vehicle (UAV) collision avoidance systems

Safety analysis for advanced separation concepts

June 27, 2005
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Conference Paper
Author:
John W. Andrews
…
Published in:
USA/Europe Air Traffic Management Seminar, 27-30 June 2005.
Topic:
air traffic control
R&D area:
R&D group:

Summary

Aviation planners have called for increasing the capacity of the air transportation system by factors of two or three over the next 20 years. The inherent spatial capacity of en route airspace appears able to accommodate such traffic densities. But controller workload presents a formidable obstacle to achieving such goals. New approaches to providing separation assurance are being investigated to overcome workload limitations and allow airspace capacity to be fully utilized. One approach is to employ computer automation as the basis for separation-assurance task. This would permit traffic densities that exceed the level at which human cognition and decision-making can assure separation. One of the challenges that must be faced involves the ability of such highly automated systems to maintain safety in the presence of inevitable subsystem faults, including the complete failure of the supporting computer system. Traffic density and flow complexity will make it impossible for human service providers to safely reinitiate manual control in the event of computer failure, so the automated system must have inherent fail-soft features. This paper presents a preliminary analysis of the ability of a highly automated separation assurance system to tolerate general types of faults such as nonconformance and computer outages. Safety-related design features are defined using the Advanced Airspace Concept (AAC) as the base architecture. Special attention is given to the impact of a severe failure in which all computer support is terminated within a defined region. The growth and decay of risk during an outage is evaluated using fault tree methods that integrate risk over time. It is shown that when a conflict free plan covers the region of the outage, this plan can be used to safely transition aircraft to regions where service can still be provided.
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Summary

Aviation planners have called for increasing the capacity of the air transportation system by factors of two or three over the next 20 years. The inherent spatial capacity of en route airspace appears able to accommodate such traffic densities. But controller workload presents a formidable obstacle to achieving such goals...

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Safety analysis for advanced separation concepts

Megapixel CMOS image sensor fabricated in three-dimensional integrated circuit technology

June 19, 2005
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Conference Paper
Author:
Vyshnavi Suntharalingam
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Published in:
2005 IEEE Int. Solid-Stat Circuits Conf. Digest of Technical Papers, Pt.1, 19-25 June 2005, p. 356-357.
Topic:
integrated circuit
R&D area:
R&D group:

Summary

In this paper a 3D integrated 1024x1024, 8um pixel visible image sensor fabricated with oxide-to-oxide wafer bonding and 2-um square 3-D-vias in every pixel is presented. The 150mm wafer technology integrates a low-leakage, deep-depletion, 100% fill factor photodiode layer to a 3.3-V, 0.35-um gate length fully depleted (FD) SOI CMOS readout circuit layer.
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Summary

In this paper a 3D integrated 1024x1024, 8um pixel visible image sensor fabricated with oxide-to-oxide wafer bonding and 2-um square 3-D-vias in every pixel is presented. The 150mm wafer technology integrates a low-leakage, deep-depletion, 100% fill factor photodiode layer to a 3.3-V, 0.35-um gate length fully depleted (FD) SOI CMOS...

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Megapixel CMOS image sensor fabricated in three-dimensional integrated circuit technology

Polymorphous computing architecture (PCA) kernel-level benchmarks [revision 1]

June 13, 2005
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Project Report
Author:
James M. Lebak
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Published in:
MIT Lincoln Laboratory Report PCA-KERNEL-1,REV.1
Topic:
computer architecture
R&D area:
R&D group:

Summary

This document describes a series of kernel benchmarks for the PCA program. Each kernel benchmark is an operation of importance to DoD sensor applications making use of a PCA architecture. Many of these operations are a part of the composite example applications described elsewhere. The kernel-level benchmarks have been chosen to stress both computation and communication aspects of the architecture. "Computation" aspects include floating-point and integer performance, as well as the memory hierarchy, while the "communication" aspects include the network, the memory hierarchy, and the I/O capabilities. The particular benchmarks chosen are based on the frequency of their use in current and future applications. They are drawn from the areas of signal processing, communication, and information and knowledge processing. The specification of the benchmarks in this document is meant to be high-level and largely independent of the implementation.
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Summary

This document describes a series of kernel benchmarks for the PCA program. Each kernel benchmark is an operation of importance to DoD sensor applications making use of a PCA architecture. Many of these operations are a part of the composite example applications described elsewhere. The kernel-level benchmarks have been chosen...

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Polymorphous computing architecture (PCA) kernel-level benchmarks [revision 1]

Design considerations for space-based radar phased arrays

June 12, 2005
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Conference Paper
Author:
Jeffrey S. Herd
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Published in:
2005 IEEE MTT-S Int. Microwave Symp. Digest, 12-17 June 2005, pp. 1631-1634.
Topic:
radar
R&D area:
R&D group:

Summary

Space Based Radar (SBR) is being considered as a means to provide persistent global surveillance. In order to be effective, the SBR system must be capable of high area coverage rates, low minimum detectable velocities (MDV), accurate geolocation, high range resolution, and robustness against electronic interference. These objectives will impose challenging requirements on the antenna array, including wide-angle electronic scanning, wide instantaneous bandwidth, large poweraperture product, low sidelobe radiation patterns, lightweight deployable structures, multiple array phase centers, and adaptive pattern synthesis. This paper will discuss key enabling technologies for low earth orbit (LEO) SBR arrays including high efficiency transmit/receive modules and multilayer tile architectures, and the parametric influence of array design variables on the SBR system.
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Summary

Space Based Radar (SBR) is being considered as a means to provide persistent global surveillance. In order to be effective, the SBR system must be capable of high area coverage rates, low minimum detectable velocities (MDV), accurate geolocation, high range resolution, and robustness against electronic interference. These objectives will impose...

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Design considerations for space-based radar phased arrays

Dynamic buffer overflow detection

June 10, 2005
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Conference Paper
Author:
Michael A. Zhivich
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Published in:
Workshop on the Evaluation of Software Defect Detection Tools, 10 June 2005.
Topic:
cyber security
R&D area:
R&D group:

Summary

The capabilities of seven dynamic buffer overflow detection tools (Chaperon, Valgrind, CCured, CRED, Insure++, ProPolice and TinyCC) are evaluated in this paper. These tools employ different approaches to runtime buffer overflow detection and range from commercial products to open source gcc-enhancements. A comprehensive test suite was developed consisting of specifically-designed test cases and model programs containing real-world vulnerabilities. Insure++, CCured and CRED provide the highest buffer overflow detection rates, but only CRED provides an open-source, extensible and scalable solution to detecting buffer overflows. Other tools did not detect off-by-one errors, did not scale to large programs, or performed poorly on complex programs.
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Summary

The capabilities of seven dynamic buffer overflow detection tools (Chaperon, Valgrind, CCured, CRED, Insure++, ProPolice and TinyCC) are evaluated in this paper. These tools employ different approaches to runtime buffer overflow detection and range from commercial products to open source gcc-enhancements. A comprehensive test suite was developed consisting of specifically-designed...

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Dynamic buffer overflow detection

Application of a development time productivity metric to parallel software development

May 15, 2005
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Conference Paper
Author:
Andrew P. Funk
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Published in:
SE-HPCS '05, 2nd Int. Worskhop on Software Engineering for High Performance Computing System Applications, 15 May 2005, pp. 8-12.
Topic:
high performance computing
R&D area:
R&D group:

Summary

Evaluation of High Performance Computing (HPC) systems should take into account software development time productivity in addition to hardware performance, cost, and other factors. We propose a new metric for HPC software development time productivity, defined as the ratio of relative runtime performance to relative programmer effort. This formula has been used to analyze several HPC benchmark codes and classroom programming assignments. The results of this analysis show consistent trends for various programming models. This method enables a high-level evaluation of development time productivity for a given code implementation, which is essential to the task of estimating cost associated with HPC software development.
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Summary

Evaluation of High Performance Computing (HPC) systems should take into account software development time productivity in addition to hardware performance, cost, and other factors. We propose a new metric for HPC software development time productivity, defined as the ratio of relative runtime performance to relative programmer effort. This formula has...

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Application of a development time productivity metric to parallel software development
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